Technology#08 in August 2026 EditionA fault-tolerant 128-qubit superconducting processor with autonomous surface-code error syndrome extraction
Julian Sterling, Meike Van Der Meer, Chuan Song et al.
OPENSTEM EDITORIAL SUMMARY
What the research examines
Engineers present a planar 128-qubit superconducting architecture implementing real-time autonomous stabilizer measurements. Real-time FPGA decoders identify and track Pauli X and Z syndrome errors without halting coherent qubit gate execution.
Why it may matter
Represents a key technological milestone in crossing the fault-tolerance threshold for scalable logical quantum computing.
What to examine carefully
High-weight correlated cosmic-ray and phonon burst events occasionally corrupt multiple distance-3 logical code patches simultaneously.
Editorial scope: This is a concise, independently written introduction based on the publisher information, not a full systematic review or independent replication. It must not replace reading the original methods, limitations and conclusions.
STUDENT RESEARCH LENS · ORIGINAL OPENSTEM NOTES
Try a small, reproducible follow-up
Simulate a distance-3 surface code cycle in Python using Stim to determine logical error rate suppression as physical two-qubit gate error rates drop below 0.1%.
Questions to investigate
- What is the average latency of the FPGA decoder relative to qubit coherence coherence times?
- How are parasitic microwave crosstalk modes mitigated across dense 2D transmon grid layouts?
These are independently proposed educational investigations, not activities that the original research authors claim to have completed.
Publication & researcher information
JournalNature
Published online2026-08-14
Authors (selected)Julian Sterling, Meike Van Der Meer, Chuan Song et al.
University / laboratoryDelft University of Technology
CountryNetherlands
Multi-author research may involve universities in several countries. Unverified institutions and contact addresses are not inferred from authors' names.